The present invention relates to a high-voltage signal detecting circuit and, more particularly, to a high-voltage signal detecting circuit which is suitable for use in a semiconductor memory device for detecting a mode selection signal.
In a semiconductor memory device having a plurality of operational modes such as a normal operational mode and a test mode, a high-voltage signal is generally used as a mode selection signal for specifying a mode other than the normal operational mode. The high-voltage signal has a potential higher than the power-source potential used for operating the semiconductor memory device. Thus, the semiconductor memory device has a high-voltage signal detecting circuit for detecting the high-voltage signal.
Referring to FIG. 1, a conventional high-voltage signal detecting circuit includes a signal transfer section including an nMOSFET 43, a pMOSFET 44 and an nMOSFET 45 serially connected in this order from a first input terminal 42 for receiving a high-voltage signal to the ground (GND). The nMOSFET 43 is of a so-called non-doped transistor having a low threshold voltage, and has a gate and a drain connected together to the first input terminal 12. The substrate of pMOSFET 44 is connected to the source thereof. The gates of pMOSFET 44 and nMOSFET 45 are connected to a second input terminal 41 for receiving a power-source potential. The node 49 connecting both the drains of pMOSFET 44 and nMOSFET 45 together is connected to an input of a potential detecting section including a pair of cascaded inverters 46 and 47, the output of which constitutes an output terminal 50.
In the conventional high voltage detecting circuit of FIG. 1, if a high-voltage signal having a higher potential than the power-source potential is supplied to the first input terminal 42, with the second input terminal 41 maintained at the power-source potential, node 49 as well as node 48 connecting the sources of nMOSFET 43 and pMOSFET 44 together rises due to on-state of nMOSFET 44 and pMOSFET 45 in response to the high-voltage signal. Thus, the output of the high-voltage signal detecting circuit rises to a high level.
However, the conventional high-voltage signal detecting circuit has a disadvantage as detailed below. FIG. 2 shows a specific timing chart of the conventional high-voltage signal detecting circuit of FIG. 1, wherein a significant potential which is higher than the ground potential and not higher than the power-source potential is applied to the first input terminal 42 at time instant t1 before the power-source potential is applied to the second input terminal 41 at time instant t2. This may occur when the power switch is turned on to start operation of the semiconductor memory device. In this case, nMOSFET 43 substantially turns on at time instant t1 due to a high level of the drain and gate potential compared to the source potential thereof. Similarly, pMOSFET substantially turns on at time instant t1 due to a low level of the gate potential which is substantially at a ground potential at time instant t1 although the gate potential is in fact at a floating state. Thus, the significant potential penetrates to nodes 48 and 49, the potentials of which rise after time instant t1. The potential at nodes 48 and 49 fall after time instant t2 due to a fixed power-source potential of the second input terminal 41. The potential rise of node 49 is transmitted to the output terminal 50 of the high voltage detecting circuit as a high level.
In the fall of the potential at node 49, nMOSFET 45 discharges electric charge from node 49 to the ground. In general, nMOSFET 45 is designed to have a lower current driveability in view of low penetrating current penetrating therethrough from the first input terminal 42 to the ground. Thus, the output of the high-voltage signal detecting circuit slowly falls down to a low level at time instant t3 after a relatively long time period. This prevents a higher-speed start-up of the semiconductor memory device. It is generally desired that semiconductor devices including a semiconductor memory device have a short start-up time after switch-on of the semiconductor devices. This should be obtained without causing higher power dissipation due to large penetrating current of MOSFETs.
It is an object of the present invention to provide a high-voltage signal detecting circuit capable of reducing the time period for start-up of a semiconductor memory device without increasing the penetrating current during the normal operational stage of the high-voltage signal detecting circuit.
The present invention provides a high-voltage signal detecting circuit including: a signal transfer section having a first input terminal for receiving an input signal, a second input terminal connected to a first source line for receiving a power source potential, and a first node electrically coupled with the first input terminal and the second input terminal; a potential detecting section for detecting a potential of the first node to output an active signal when the input signal has a higher potential than the power source potential; and a discharge section for discharging electric charge from the first node before the second terminal receives the power source potential.
In accordance with the high-voltage signal detecting circuit of the present invention, the discharge section discharges electric charge from the first node before application of the source potential to the second input terminal. Thus, a quick start-up can be obtained in the semiconductor memory device having the high-voltage signal detecting circuit of the present invention.